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Example text

The C flag is set. Register 12H contains 1BH. The following statement leaves the value 4AH in register 34H. The H flag is set, and the C, Z, S, V, and D flags are set to 0. ADC 34H, 12H Op Code: 14 12 34 Example: Register 4BH contains 82H. The C flag is set. Working register R3 contains 10H. Register 10H contains 01H. The following statement leaves the value 84H in register 4BH. The S flag is set to 1, and the C, Z, V, D, and H flags are set to 0. 75Â7UGT U /CPWCN #FFTGUU 5RCEG =L/2* ADC Add with Carry Example: Register 6CH contains 2AH.

An indexed address consists of a register address offset by the contents of a designated Working Register (the Index). This offset is added to the register address to obtain the address of the operand. Figure 2-5 illustrates this addressing convention. 75Â7UGT U /CPWCN #FFTGUUKPI /QFGU =L/2* Register File Points to the Working Register RP Points to the Origin of Working Register Group Program Memory Address Two Operand Instruction dst/ src Offset X OpCode Address Offset Operand Value Used in the Instruction Figure 2-5.

Represents a number in the range of 00H to FFH n = 0 – 15 Indirect Register Pair or Working Register Pair Reg p = 0, 2, 4, 6, 8, 10, 12, or 14 RRp Ir Indirect Working Register @Rn n = 0 –15 IR Indirect Register or Indirect Working Register @Reg Reg. represents a number in the range of 00H to FFH n = 0– 15 Indirect Working Register Pair @RRp p = 0, 2, 4, 6, 8, 10, 12, or 14 Indirect Register Pair or Working Register Pair @Reg Reg. represents an even number in the range 00H to FFH p=0, 2, 4, 6, 8, 10, 12, or 14 RR Irr IRR X Indexed Operand Range* See Table 3-11, condition codes @Rn @RRp Reg (Rn) Reg.

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Z8Plus user's manual

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